Some previous minicomputers have utilized a microprocessor in their control section. These machines generally use the microprocessor to execute the assembly language level instructions of the minicomputer by running predetermined series of microprograms. These microprogrammed minicomputers have had the advantages that they are versatile in providing expandable instructions and in providing powerful yet economical minicomputer architectures. They have had the disadvantages that they have generally been slower in execution of programs than computers having sequential gating control sections where the logic had been skillfully minimized. Since they have generally taken longer to execute the same instruction, there have been corresponding decreases in the rate of input/output transfers for throughput of data which could be handled by these machines. Also, since the microprogrammable control section typically operated as a separate computer of its own, many operations required synchronization of the internal timing for their microprocessor and that of other portions of the minicomputer, e.g., the memory and I/O sections.
Similarly, peripheral hardware such as ancillary processors, etc. suffered a great decrease in possible performance because they were interfaced via the standard I/O system with all the interfacing delays and synchronization required between the two units. This has been a critical limitation for many applications where custom arithmetic processing hardware is intended to be added to the computer to augment its performance in a particular area. In contrast, the preferred embodiment provides the ability to directly interface the microprocessor to ancillary peripherals and processors. Extremely fast transfers of large blocks of data as well as communications between the microprocessor and other processors is possible without any additional synchronization or overhead associated with the microcomputer architecture. Since the devices or processors are interfaced directly to the internal data busses of the computer and addressed under direct microprogram control as if they were internal processor registers, the maximum possible throughput is achieved.
Some previous computers had the ability to bootstrap or load predetermined programs into control memory via front panel controls or from an I/O device in response to a bootstrap loader control switch. Other computers also executed some form of bootstrap program when power was first turned on or when power was restored after some non-operating period. However, these previous bootstrap systems had the disadvantage that in the event that power was restored to the computer, but the program stored in memory had been destroyed, there was no way to request a bootstrap operation from a remote site. In contrast to this, the preferred embodiment provides remote program load capability which allows another processor or a data communication device to have control over the run/halt controls of the computer. The remote program load feature allows the user to initiate an automatic system bootstrap operation which may include a complete reloading of system software from a disc, a communication line, or any other user-defined device. The system is then restarted. This technique provides the advantage that the need for experienced operators can be greatly minimized, particularly for those systems with complex start up procedures or for distributive processing systems where automatic cold start may be required. Of course, this feature is essential for computer installations located at unattended, remote or inaccessible sites.
Furthermore, previous computers using a microprocessor have used fixed microcycle times. The time period selected was usually the sum of all the worst case timing delays throughout the processor for the most complex, i.e., lengthy micro-instruction. Therefore, the microprocessor control section was working well below the maximum possible speed, except when executing the worst case micro-instructions. In contrast, the preferred embodiment varies the length of the microcycle as a function of both the type of micro-instruction and the state of the minicomputer at the time that micro-instruction is to be executed. The microcycle timing generator then varies the cycle time in response to these conditions.